最終更新:2026-08-31 (月) 08:52:31 (13d)
USB 2.0/仕様/Chapter 11
CHAPTER 11 HUB SPECIFICATION
- 11.1 Overview
- 11.1.1 Hub Architecture
- 11.1.2 Hub Connectivity
- 11.2 Hub Frame/Microframe Timer
- 11.2.1 High-speed Microframe Timer Range
- 11.2.2 Full-speed Frame Timer Range
- 11.2.3 Frame/Microframe Timer Synchronization
- 11.2.4 Microframe Jitter Related to Frame Jitter
- 11.2.5 EOF1 and EOF2 Timing Points
- 11.3 Host Behavior at End-of-Frame
- 11.3.1 Full-/low-speed Latest Host Packet
- 11.3.2 Full-/low-speed Packet Nullification
- 11.3.3 Full-/low-speed Transaction Completion Prediction
- 11.4 Internal Port
- 11.4.1 Inactive
- 11.4.2 Suspend Delay
- 11.4.3 Full Suspend (Fsus)
- 11.4.4 Generate Resume (GResume)
- 11.5 Downstream Facing Ports
- 11.5.1 Downstream Facing Port State Descriptions
- 11.5.2 Disconnect Detect Timer
- 11.5.3 Port Indicator
- 11.6 Upstream Facing Port
- 11.6.1 Full-speed
- 11.6.2 High-speed
- 11.6.3 Receiver
- 11.6.4 Transmitter
- 11.7 Hub Repeater
- 11.7.1 High-speed Packet Connectivity
- 11.7.2 Hub Repeater State Machine
- 11.7.3 Wait for Start of Packet from Upstream Port (WFSOPFU)
- 11.7.4 Wait for End of Packet from Upstream Port (WFEOPFU)
- 11.7.5 Wait for Start of Packet (WFSOP)
- 11.7.6 Wait for End of Packet (WFEOP)
- 11.8 Bus State Evaluation
- 11.8.1 Port Error
- 11.8.2 Speed Detection
- 11.8.3 Collision
- 11.8.4 Low-speed Port Behavior
- 11.9 Suspend and Resume
- 11.10 Hub Reset Behavior
- 11.11 Hub Port Power Control
- 11.11.1 Multiple Gangs
- 11.12 Hub Controller
- 11.12.1 Endpoint Organization
- 11.12.2 Hub Information Architecture and Operation
- 11.12.3 Port Change Information Processing
- 11.12.4 Hub and Port Status Change Bitmap
- 11.12.5 Over-current Reporting and Recovery
- 11.12.6 Enumeration Handling
- 11.13 Hub Configuration
- 11.14 Transaction Translator
- 11.14.1 Overview
- 11.14.2 Transaction Translator Scheduling
- 11.15 Split Transaction Notation Information
- 11.16 Common Split Transaction State Machines
- 11.16.1 Host Controller State Machine
- 11.16.2 Transaction Translator State Machine
- 11.17 Bulk/Control Transaction Translation Overview
- 11.17.1 Bulk/Control Split Transaction Sequences
- 11.17.2 Bulk/Control Split Transaction State Machines
- 11.17.3 Bulk/Control Sequencing
- 11.17.4 Bulk/Control Buffering Requirements
- 11.17.5 Other Bulk/Control Details
- 11.18 Periodic Split Transaction Pipelining and Buffer Management
- 11.18.1 Best Case Full-Speed Budget
- 11.18.2 TT Microframe Pipeline
- 11.18.3 Generation of Full-speed Frames
- 11.18.4 Host Split Transaction Scheduling Requirements
- 11.18.5 TT Response Generation
- 11.18.6 TT Periodic Transaction Handling Requirements
- 11.18.7 TT Transaction Tracking
- 11.18.8 TT Complete-split Transaction State Searching
- 11.19 Approximate TT Buffer Space Required
- 11.20 Interrupt Transaction Translation Overview
- 11.20.1 Interrupt Split Transaction Sequences
- 11.20.2 Interrupt Split Transaction State Machines
- 11.20.3 Interrupt OUT Sequencing
- 11.20.4 Interrupt IN Sequencing
- 11.21 Isochronous Transaction Translation Overview
- 11.21.1 Isochronous Split Transaction Sequences
- 11.21.2 Isochronous Split Transaction State Machines
- 11.21.3 Isochronous OUT Sequencing
- 11.21.4 Isochronous IN Sequencing
- 11.22 TT Error Handling
- 11.22.1 Loss of TT Synchronization With HS SOFs
- 11.22.2 TT Frame and Microframe Timer Synchronization Requirements
- 11.23 Descriptors
- 11.23.1 Standard Descriptors for Hub Class
- 11.23.2 Class-specific Descriptors
- 11.24 Requests
- 11.24.1 Standard Requests
- 11.24.2 Class-specific Requests

